New power supply designs are becoming harder and harder to measure for gain margin and phase margin. This measurement is important because step load testing does not measure critical parameters such as conditional stability. Measuring gain and phase of the feedback versus frequency requires finding a point in the loop to inject a test signal.
One such point is the connection between the voltage error amplifier and the pulse width modulator (PWM) comparator, but that point has been moved inside most PWM integrated circuits, and is no longer accessible. A second point is in series with the output of single-output supplies, but this point is rapidly becoming inaccessible or invalid with the inclusion of multiple output voltages feeding one summing node.
A new technique has been developed which does not suffer from either of these limitations and which can be implemented on virtually any PWM chip. This research describes this technique and gives examples of how to apply it to various types of integrated circuits.
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